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HD74HC164
8-bit Parallel-out Shift Register
REJ03D0580-0300 Rev.3.00 Jan 31, 2006
Description
This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. Inputs A & B permit complete control over the incoming data. A low at either or both inputs inhibits entry of new data and resets the first flip-flop to the low level at the next clock pulse. A high level on the input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup and hold time requirements will be entered. Data is serially shifted in and out of the 8-bit register during the positive going transition of the clock pulse. Clear is independent of the clock and accomplished by a low level at the clear input.
Features
* * * * * * High Speed Operation: tpd (Clock to Q) = 14.5 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 4 A max Ordering Information
Part Name HD74HC164P HD74HC164FPEL Package Type DILP-14 pin SOP-14 pin (JEITA) Package Code (Previous Code) PRDP0014AB-B (DP-14AV) PRSP0014DF-B (FP-14DAV) Package Abbreviation P FP -- EL (2,000 pcs/reel) Taping Abbreviation (Quantity)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs Clear L H H H H Clock X A X X L X H B X X X L H QA L QAo L L H QB L QBo QAn QAn QAn Outputs ********* ********* ********* ********* ********* ********* QH L QHo QGn QGn QGn
QAo to QHo = Outputs remain unchanged. QAn to QGn = Data shifted from the previous stage on a positive edge at the clock input. H: High level L: Low level X: Irrelevant
Rev.3.00, Jan 31, 2006 page 1 of 6
HD74HC164
Pin Arrangement
Serial Inputs
A B QA QB
1 A 2 3 4 5 6 7 (Top view) B QA QB QC QD QH QG QF QE CLR
14 VCC 13 QH 12 QG Outputs 11 QF 10 QE 9 8 Clear Clock
Outputs QC QD GND
CK
Logic Diagram
Clock A B
DQ CLR
DQ CLR
DQ CLR
DQ CLR
DQ CLR
DQ CLR
DQ CLR
DQ CLR
Clear
QA
QB
QC
QD
QE
QF
QG
QH
Timing Diagram
Clock A B Clear QA QB QC QD QE QF QG QH
Rev.3.00, Jan 31, 2006 page 2 of 6
HD74HC164
Absolute Maximum Ratings
Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Symbol VCC Vin, Vout IIK, IOK IO ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 25 50 500 -65 to +150 Unit V V mA mA mA mW C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
Recommended Operating Conditions
Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time*1 Note: Symbol VCC VIN, VOUT Ta tr, tf Ratings 2 to 6 0 to VCC -40 to 85 0 to 1000 0 to 500 0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Unit V V C ns Conditions
VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
Electrical Characteristics
Item Input voltage Symbol VCC (V) VIH 2.0 4.5 6.0 VIL 2.0 4.5 Output voltage VOH 6.0 2.0 4.5 6.0 4.5 6.0 VOL 2.0 4.5 6.0 4.5 Input current Quiescent supply current Iin ICC 6.0 6.0 6.0 Min 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.18 5.68 -- -- -- -- -- -- -- Ta = 25C Typ Max -- -- -- -- -- -- 2.0 4.5 6.0 -- -- 0.0 0.0 0.0 -- -- -- -- -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.26 0.26 0.1 4.0 Ta = -40 to+85C Unit Min Max 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.13 5.63 -- -- -- -- -- -- -- -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.33 0.33 1.0 40 IOL = 4 mA IOL = 5.2 mA A Vin = VCC or GND A Vin = VCC or GND, Iout = 0 A V IOH = -4 mA IOH = -5.2 mA Vin = VIH or VIL IOL = 20 A V Vin = VIH or VIL IOH = -20 A V V Test Conditions
Rev.3.00, Jan 31, 2006 page 3 of 6
HD74HC164
Switching Characteristics
(CL = 50 pF, Input tr = tf = 6 ns)
Item Maximum clock frequency Propagation delay time Symbol VCC (V) fmax 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Removal time trem 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 -- Ta = 25C Ta = -40 to +85C Unit Min Typ Max Min Max -- -- -- -- -- -- -- -- -- -- -- -- 100 20 17 5 5 5 5 5 5 80 16 14 80 16 14 -- -- -- -- -- -- -- -- 14 -- -- 15 -- -- 17 -- -- 1 -- -- 0 -- -- 0 -- -- 8 -- -- 5 -- -- 5 -- 5 5 25 29 160 32 27 160 32 27 175 35 30 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 75 15 13 10 -- -- -- -- -- -- -- -- -- -- -- -- 125 25 21 5 5 5 5 5 5 100 20 17 100 20 17 -- -- -- -- 4 20 24 200 40 34 200 40 34 220 44 37 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 95 19 16 10 ns Clear to Clock MHz Test Conditions
tPHL
ns
Clock to Q
tPLH
ns
tPHL
ns
Clear to Q
Setup time
tsu
ns
A, B to Clock
Hold time
th
ns
Clock to A, B
Pulse width
tw
ns
Clock
ns
Clear
Output rise/fall time Input capacitance
tTLH, tTHL
ns
Cin
pF
Rev.3.00, Jan 31, 2006 page 4 of 6
HD74HC164
Test Circuit
Measurement point
CL*
Note: CL includes the probe and fig capacitance.
Waveforms
tf
90%
tr
90% 50% 10% 10%
VCC 0V VCC
50% 50%
Clear
50%
tW (Clear) tf
90%
trem tr
50% 90% 50% 10%
tW (Clock)
Clock
10%
tW (Clock) tr Serial A, B
10% 90% 50%
0V tsu
90%
th
50%
th VCC
50%
50% 10%
tPHL Output QA
(Note 3) 50%
tsu
tPLH
50%
tf tPHL
0V VOH
50%
VOL tTHL tTLH
Notes: 1. Input waveform: PRR 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns 2. The output are measured one at a time with one transition per measurement. 3. See function table for QB to QH outputs.
Rev.3.00, Jan 31, 2006 page 5 of 6
HD74HC164
Package Dimensions
JEITA Package Code P-DIP14-6.3x19.2-2.54 RENESAS Code PRDP0014AB-B Previous Code DP-14AV MASS[Typ.] 0.97g
D
14
8
1 b3
7
Z
E
Reference Symbol
Dimension in Millimeters Min Nom 7.62 19.2 6.3 20.32 7.4 5.06 0.51 0.40 0.48 1.30 0.19 0 2.29 2.54 0.25 0.31 15 2.79 2.39 2.54 0.56 Max
A
A1
e1 D E
L
A A1 bp
e
bp
e1
c
b3 c
e Z
( Ni/Pd/Au plating )
L
JEITA Package Code P-SOP14-5.5x10.06-1.27
RENESAS Code PRSP0014DF-B
Previous Code FP-14DAV
MASS[Typ.] 0.23g
*1
D 8
F
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
14
bp
HE
E
Index mark
*2
c
Reference Symbol
Dimension in Millimeters Min Nom 10.06 5.50 Max 10.5
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
D E A2 A1 0.00
7 bp x M L1
0.10
0.20 2.20
A bp b1 c c
1
0.34
0.40
0.46
0.15
0.20
0.25
A
HE
0 7.50 7.80 1.27
8 8.00
A1
y L
e x y
0.12 0.15 1.42 0.50
1
Detail F
Z L L 0.70 1.15
0.90
Rev.3.00, Jan 31, 2006 page 6 of 6
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